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ARM Cortex devices are increasingly becoming dual-core: Are you ready?

Posted by Magnus Unemyr on Jul 20, 2015 1:16:00 PM

More and more ARM Cortex devices are dual-core, such as NXP’s LPC4300 with its Cortex-M4 and Cortex-M0 combo, or Freescale’s Vybrid equipped with Cortex-A5 and Cortex-M4 cores. Embedded systems using dual-core devices are typically fairly sophisticated, with an increased application complexity, which increases debugging difficulties compared to single-core systems as well.

Embedded systems developers moving from single-core to dual-core devices then ask: How do you develop and debug an embedded system using a dual-core processor? From a code development point of view, it is fairly easy. Just create two different projects in your ARM Cortex C/C++ IDE, and create each application project as if the device was a single-core processor. But how to debug asymmetric dual-core devices where the cores are not even using the same CPU core?

dualcore

From a practical perspective, both CPU cores can usually be accessed using one JTAG cable, in a daisy-chain configuration. The SEGGER J-Link debug probe supports this for example. Daisy chaining two CPU cores allows debugging of two cores simultaneously, using one JTAG probe and one JTAG cable.

The next question is how the debugger can debug two CPU cores (often of different type), at the same time, in the same debugger GUI instance? The trick is to have a debugger that is dual-core aware. In practice, this means it must support the JTAG daisy-chain mode. Typically two instances of the debugger back-end is launched (one for each core), behind one single unified debugger GUI instance.

Professional debuggers (for example the debugger in the Atollic TrueSTUDIO IDE) permit the use of two debugger back-ends simultaneously. In effect, the debugger connects to two CPU cores, using one JTAG probe and one JTAG cable in JTAG daisy-chain mode, using two debugger back-end instances.

The debugger GUI should be able to control both the debugger back-ends from the same GUI instance, enabling the developer to swap context and look into either core with a mouse-click. An additional feature of value is the capability to “pin” debugger windows from one core also in the GUI context of the other core. For example, this allows the developer to see the SFR register window from CPU core number one, when in the context of debugging core number two, or vice versa.

The Atollic TrueSTUDIO C/C++ debugger supports debugging of two cores simultaneously using one single IDE GUI instance, with one JTAG debug probe. Embedded developers can easily toggle between the software executing on the different cores in order to visualize important data when both cores execute its different tasks. Using Atollic TrueSTUDIO, multi-core debugging becomes a natural and intuitive extension of single-core debugging, allowing embedded developers to spend time on solving bugs, not fighting the difficulties of a less-than-ideal debugging solution.

In case you are evaluating or using a dual-core device such as Freescale Vybrid or NXP LPC4300, you may want to look into these capabilities.

Do you want to learn more on tools for ARM Cortex development and debugging? Read this whitepaper!

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Topics: ARM Cortex, Debugging, Atollic TrueSTUDIO, SEGGER J-Link