TruePERSPECTIVES_logo.png

Dual-core microcontrollers: Dual-power or Dual-pain?

Posted by Magnus Unemyr on Jan 29, 2015 2:34:00 PM

 

Advances in embedded controllers lead to ever increasing application complexity, which in turn increases the difficulties involved in debugging and testing software products. The advent of new dual-core devices such as the Freescale Vybrid with its Cortex-M4 and Cortex-A5 cores, or the NXP LPC43xx with its Cortex-M0 and Cortex-M4 cores, creates new debugging challenges for engineers accustomed to debugging single-core applications.

So does the new dual-core embedded microcontrollers introduce dual-power, or perhaps dual-pain? From the point of the embedded developer, both may be equally true. In terms of performance, or system partitioning, there may be clear benefits. But for the developers, new types of problems arise - in particular related to debugging.  

dualcore

 

How do you debug a dual-core processor anyway? In particular, how to debug asymmetric dual-core devices where both cores are not using the same CPU core design (this is for example the case with both Freescale Vybrid and NXP LPC4300)?

From a physical point of view, both cores can typically be accessed using one JTAG cable, using a daisy-chain configuration. This is supported by for example SEGGER J-Link, which allows debugging of two cores simultaneously, using one JTAG probe and one JTAG cable.

But how will the debugger be able to debug two CPU cores (often of different type), at the same time, in one GUI instance? Again, the trick is to have a dual-core aware debugger that makes use of the JTAG daisy-chain mode. Typically two instances of the debugger back-end is launched (one for each core), behind one single unified debugger GUI instance.

More advanced high-end debuggers, such as our Atollic TrueSTUDIO debugger, supports simultaneous use of two debugger back-ends, connected to two CPU cores, using one JTAG probe and one JTAG cable, in JTAG daisy-chain mode.

To provide for a good user experience, one debugger GUI instance should then be able to control both the debugger back-ends, such that the developer can switch debug context and look into core one or two with a mouse-click, and to “pin” debugger windows from one CPU also in the GUI context of the other CPU core. That allows for example to see the SFR register window from core number one, when in the context of debugging core number two, or vice versa.

Our Atollic TrueSTUDIO C/C++ debugger enables debugging of two cores at the same time using a single IDE GUI instance, along with a single hardware JTAG probe. Developers can conveniently toggle between applications executing on separate cores so as to visualize critical information while each core executes its separate assignments. With TrueSTUDIO, multi-core debugging is a natural, intuitive extension of single-core debugging that allows developers to focus on solving problems, not coping with complexities of the debugging solution.

In case you are evaluating, or using, a dual-core device such as Freescale Vybrid or NXP LPC4300, you may want to look into these capabilities.

Topics: ARM Cortex, Debugging, Atollic TrueSTUDIO, SEGGER J-Link