New whitepaper on ETM/ETB instruction tracing on Cortex-M devices

Posted by Magnus Unemyr on Apr 23, 2015 2:19:57 PM

As outlined in a recent blog article, ETM/ETB instruction tracing is the heavy artillery in Cortex-M debugging, and you may need it to solve that impossible "one million dollar bug", or if you cannot stop on breakpoints without damaging physical equipment, which can be the case in motor control applications for example.

Using ETM/ETB instruction tracing, you can record execution history for later analysis, and thus work out what the CPU did prior to the bug. To do that, you need an ETM-trace enabled debug probe, such as the SEGGER J-Trace, as well as a debugger IDE like Atollic TrueSTUDIO with trace support. For ETB, no particular trace-enabled debugger probe is needed, but the target device needs to have ETB on-chip. You can read more on ETM/ETB instruction tracing on Cortex-M devices like STM32, Kinetis or LPC in our new whitepaper.



You can access the ETM/ETB instruction tracing whitepaper here:

Read our ETM/ETB instruction tracing whitepaper!


For more information on advanced development and debugging for ARM Cortex devices, read this white paper:

Read our ARM development whitepaper!



Topics: ARM Cortex, Debugging, Atollic TrueSTUDIO, SEGGER J-Link