The Segger J-Link and other JTAG/debug probes (like ST-LINK for STM32 devices) offer great debugging capabilities on ARM Cortex-M devices, such as STM32, EFM32, XMC or Kinetis. Debugging techniques supported by J-Link and ST-LINK include for example hard fault crash analysis and real-time system analysis with event- and data tracing using the Serial Wire Viewer (SWV) interface.
This is great, but what if you are still stuck? Or perhaps you will damage physical H/W if you stop execution on a breakpoint, which can be the case in motor control applications. In such case, you may need to call for the heavy debugging artillery. For ARM Cortex developers, that means bringing in a debug probe that can record execution history for later analysis, using the ETM instruction trace interface from ARM. To do that, you need an ETM-trace enabled debug probe, such as the SEGGER J-Trace, as well as a debugger IDE like Atollic TrueSTUDIO with trace support..
The SEGGER J-Trace offers more or less the same debugger capabilities as the more common SEGGER J-Link debug probes, but it adds instruction trace support using ARM’s ETM instruction trace interface for ARM Cortex devices. Additionally, you will need a high-end ARM Cortex debugger IDE like Atollic TrueSTUDIO to visualize the ETM instruction trace data recorded by SEGGER J-Trace.
A problem with recording the execution history by performing instruction tracing is that the amount of data recorded is absolutely massive. On a Cortex-M4 for example, one second of execution time requires approximately 100MB binary packed to store, which expands to some 5-10GB of human readable data. And so, great care is taken trying to avoid recording more instruction trace data than needed to solve the debug problem at hand.
For this reason, high-end debuggers such as Atollic TrueSTUDIO offer advanced capabilities for starting and stopping trace recording automatically. One option is to set a type of “breakpoint” on certain code lines in the source code editor, that start and stop the trace recording when execution pass over them.
Another alternative is to set trace triggers, that can be pre-configured to start or stop trace recording when program execution pass a certain address or range in the code. These addresses can for example be symbolic, such as the start of a C function with a certain name. And finally, trace recording can be started or stopped due to certain types of data memory accesses (for example a read, write or either read/write on variable).
With trace start or stop ”breakpoints” in the editor, or pre-configured code/data trace trigger logic, the amount of trace data recorded can be controlled while still enabling good possibilities to post-analyze the execution history, and thus work out why a certain bug happens. With the trace start and stop properly configured, the SEGGER J-Trace debugger probe will record execution history during relevant times of execution. When you finally do stop on a breakpoint, the recorded execution history is uploaded to the debugger GUI which then visualizes the data in a meaningful way.
The main instruction trace view typically looks somewhat like a disassembler view, showing you exactly which machine code instructions have been executed. High-end ARM Cortex debuggers like Atollic TrueSTUDIO can then provide a “zoom” capability that allows you to view the execution history on different abstraction or “zoom” levels; either Assembler trace level, mixed Assembler and C trace level, C trace level or Function call trace level.
Here, you can for example see what the trace log looks like when "zoomed" to different trace abstraction levels in the Atollic TrueSTUDIO debugger:
The debugger additionally provides you with search capabilities to enable navigation in the massive amount of trace data; as well as data export functions enabling you to export the trace buffer to a neutral format (such as CSV) that can be analyzed with offline tools. Perhaps you even write your own little utility application or script that do very specific searches in the exported trace data.
Read this whitepaper for more information on ETM instruction trcing using SEGGER J-Trace:
For more information on advanced development and debugging for ARM Cortex devices, read this white paper: